• From: "Robert McGwier" <rwmcgwier@xxxxxxxxxxxxxxx
• Date: Tue, 8 Jul 2003 21:57:31 -0000

```Alex:

It is MUCH more complex than that if you want anything
like good spur performance.

If you will look at the ADS data sheet pdf you will see that
the "phase word" is 17 bits and the accumulator is 48 bits.
If you willy nilly make your frequency just any old frequency
and convert that to 48 bits of phase increment (frequency)
you are going to have spurs that are -6.09 dBc or 1/4 the
power of the desired frequency!!

You must have two mixers in your design.  One in hardware with
the DDS, and one in software to do the last stage of mixing.

In order to land on a frequency that yields the minimized
spurs, your acceptible frequency input or phase increment
for the accumulator to the DDS must be

0TTTTTTTTTTTTTTT10000000000000000000000000000000
^               ^                              ^
0              16                             47

So if you wish to tune to frequency F Hz.  You tune
the DDS as follows.

200,000,000/2^16  are the allowable phase words.
This is 3051.7578125 BUT you must not forget the
1 in the 2^16 spot.  So acceptable frequencies
are firstly, F< 100.0 (so highest order bit is 0)

N * 3051.7578125 + 1525.87890625 Hz

where N is an integer.

Remember our poor old frequency F, we have to find
the N that gets us nearest to it.

3051.7578125* floor[(F - 1525.87890625)/3051.7578125] = N

Immediately after the I and Q A/D samples are delivered,
to be "on frequency" you multiply every complex sample
coming in the door by an exponential determined as follows:

phi = phi + frac,
phi is mod back to [0,2pi)

exp(- jphi)  where frac is

F - (N** 3051.7578125 + 1525.87890625) and N is the
number you just determined.

This is just a complex or doubly balanced mixer done
in software.  It is expensive of CPU ticks as well
as a bit complicated but absolutely required for
good performance.  You should have seen the spurs
before we did this to the SDR-1000.  They are not
all gone but are now the minimum ones that are completely
predictable.  We eventually will be able to tune around
them by putting the "bad frequencies" in a table and
making local adjustments.  This will be done later
after things like a working noise blanker, adaptive
noise canceller, adaptive notch filter, and manual
notch filter are in the code.  I am using the
spurs for automatic notch debugging!

Bob
N4HY

-----Original Message-----
Sent: Tuesday, July 08, 2003 15:07

On Tuesday 08 July 2003 3:13 pm, Edson Pereira wrote:
> Hi Bob,
>
> I understand the need for square levels for the multiplexer. For some
> reread the datasheet and found that the chip only provides a comparator.
>
> -- Edson
>

Why they didn't put in two comparators I'm not sure - it seems silly to have
only one. I guess it's pretty easy to do IQ in DDS though since all you have
to do is shift your address forward in the sine lookup table a bit.

Well, I'm nearly finalised on the mixer design, and I think I'm going to
reuse
most of someone else's board for the DDS. I've also ordered one of those
hugely expensive oscillators... I just have to wait 3 months for that so for
now it's:

a) 50MHz Xtal osc and use the internal PLL to get the 200MHz ref
or b) 50MHz Xtal osc and some conventional transistor doublers.

Cheers

Alex

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